Emerson Bristol ControlWave LP Bedienerhandbuch PDF herunterladen (Seite 91)

CI-ControlWaveLP Specifications / 4-1

Section 4

SPECIFICATIONS

4.1 CPU, MEMORY & PROGRAM INTERFACE

Processor: 486SX-ULP, 25MHz

Memory: 4Mbytes of system FLASH

2Mbtyes of on-board static RAM

512Kbytes Boot-Block FLASH BIOS.

Real Time Clock: 14818A-compatible RTC and alarm with 114 bytes of

battery-backed CMOS memory.

Connectors: (see Table 4-1 and referenced Tables)

Table 1-1 - CPU Board Connector Summary

Ref. # Pins Function Notes

J1 9-pin COM1 9-pin male D-sub see Figure 4-1 & Table 4-2

J2 9-pin COM2 9-pin male D-sub see Figure 4-1 & Table 4-2

J3 9-pin COM3 9-pin male D-sub see Figure 4-1 & Table 4-2

J4 9-pin COM4 9-pin male D-sub see Figure 4-1 & Table 4-2

J5 9-pin COM5 9-pin male D-sub see Figure 4-1 & Table 4-2

J9 70-pin Memory Expansion see Figure 4-2 & Table 4-3

J10 68-pin CPU/FMIOB Connector 1 see Figure 4-3 & Table 4-4

J11 68-pin CPU/FMIOB Connector 2 see Figure 4-3 & Table 4-4

J12 10-pin ISA PLD JTAG Header see Figure 4-4

J13 10-pin CPU JTAG Header see Figure 4-4

J14 10-pin Manufacturing Test Power see Figure 4-4

J15 14-pin Port 80 Diagnostics see Figure 4-5 & Table 4-5

J24 10-pin Local Control PLD JTAG Header see Figure 4-4

Figure 4-1 - DB9 9-Pin Connector Associated with COM1 through COM5

1 2 ... 86 87 88 89 90 91 92 93 94 95 96 ... 165 166

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Emerson Bristol ControlWave LP Bedienerhandbuch Seite 91